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Intel is paving the way for a trillion transistors in next-generation chips by 2030

Moore's Law Lives! Intel Paves Way To A Trillion Transistors In Next-Gen Chips By 2030 1
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IEDM has Intel Research was demonstrated How Moore’s Law is alive and how Chipzilla plans to offer a new generation of trillion-transistor chips by 2030.

Intel Research Strengthens Moore’s Law, Paves Path to One Trillion Transistors by 2030

Press release: At IEDM 2022, the 75th anniversary of the transistor, Intel is aiming for a new 10x improvement in density in its packaging technology, using a new material just 3 atoms thick to advance transistor scale.

News: Intel today unveiled research breakthroughs that fuel its innovation pipeline to deliver Moore’s Law to a trillion transistors in a package over the next decade. At the IEEE International Electronic Devices Meeting (IEDM) 2022, Intel researchers demonstrated advances in 3D packaging technology with a new 10x improvement in density; New materials for 2D transistor scaling beyond the RibbonFET, including a super-thin material just 3 atoms thick; new capabilities in energy efficiency and memory for higher performance computing; and advances for quantum computing.

“Seventy-five years since the invention of the transistor, innovation based on Moore’s Law continues to meet the world’s growing demand for computing. At IEDM 2022, Intel is showcasing both cutting-edge and concrete research achievements needed to overcome current and future obstacles, meet this insatiable demand, and keep Moore’s Law alive and well for years to come.”

— Gary Patton, Intel vice president and general manager of Component Research and Design Enablement

What happens at IEDM: Celebrating the 75th anniversary of the transistor, Dr. Ann Kelleher, executive vice president and general manager of Technology Development at Intel, will moderate the plenary session at IEDM. Kelleher will outline the way forward for sustainable industrial innovation—uniting the ecosystem around a systems-based strategy to innovate more effectively to meet the world’s growing demand for computing and keep pace with Moore’s Law. The session, “Celebrating 75 years of the transistor! A Look at the Evolution of Moore’s Law Innovation” takes place on Monday, December 5th at 9:45am PST.

Why it matters: Moore’s Law is critical to meeting the world’s insatiable computing needs, as increasing data consumption and the move toward increasing artificial intelligence (AI) are driving the greatest acceleration in demand to date.

Continuous innovation is the cornerstone of Moore’s Law. Many of the key innovation milestones for sustained power, performance, and cost improvements over the past two decades in PCs, GPUs, and data centers, including strained silicon, Hi-K metal gate, and FinFET, began with Intel’s Components Research Group. . Additional research is on the roadmap today, including RibbonFET gate-all-around (GAA) transistors, PowerVia backside power transfer technology, and packaging breakthroughs such as EMIB and Foveros Direct.

At IEDM 2022, Intel’s Components Research Group demonstrated its commitment to innovation in three key areas to continue Moore’s Law: new 3D hybrid package packaging technology to enable seamless integration of chiplets; super-thin, 2D materials to fit more transistors on a chip; and new capabilities in energy efficiency and memory for higher performance computing.

How we do it: Researchers at the Components Research Group have identified new materials and processes that blur the line between packaging and silicon. We reveal critical next steps toward extending Moore’s Law to a trillion transistors in a package, including advanced packaging that can achieve an additional 10x interconnect density and lead to quasi-monolithic chips. Intel’s material innovations also identified practical design options that could meet the demands of transistor scaling using a new material only 3 atoms thick, allowing the company to continue scaling beyond the RibbonFET.

Intel introduces quasi-monolithic chips for next-generation 3D packaging:

  • The latest hybrid packaging research presented by Intel at IEDM 2022 shows an additional 10x improvement in density for power and performance compared to Intel’s IEDM 2021 research presentation.
  • Continuing in the 3 um range, hybrid interconnect scaling achieves similar interconnect densities and bandwidths to those found in monolithic system-on-chip interconnects.

Intel is looking at super-thin “2D” materials to fit more transistors on a chip:

  • Intel has demonstrated a fully assembled nanosheet structure using a 2D channel material only 3 atoms thick, achieving near-ideal switching of transistors in a double-gate structure at room temperature with low leakage current. These are the two key advances needed to assemble GAA transistors and move beyond the basic limits of silicon.
  • The researchers also revealed the first comprehensive analysis of electrical contact topologies in 2D materials, which could pave the way for high-performance and scalable transistor channels.

Intel brings new capabilities in power efficiency and memory for higher performance computing:

  • To make more efficient use of chip space, Intel is redefining scaling by developing memory that can be stacked vertically on top of transistors. Intel is demonstrating industry-first stacked ferroelectric capacitors that match the performance of conventional ferroelectric trench capacitors and can be used to build FeRAM on a logic die.
  • The industry-first device-level model captures mixed phases and defects for advanced ferroelectric hafnia devices, marking significant progress for Intel in supporting industrial tools to develop new memories and ferroelectric transistors.
  • Bringing the world one step closer to moving beyond 5G and solving energy efficiency challenges, Intel is building a path to 300-millimeter GaN-on-silicon wafers. Intel’s breakthrough in this area demonstrates a 20-fold gain over industry-standard GaN and sets an industry record for high-performance power supplies.
  • Intel is making breakthroughs in super-power-efficient technologies, especially non-forget transistors, to retain data even when the power is turned off. Intel researchers have already broken two of the three barriers that prevent the technology from being fully viable and operational at room temperature.

Intel continues to introduce new concepts in physics with advances in delivering better qubits for quantum computing:

  • Intel researchers are trying to find better ways to store quantum information by better understanding various interface defects that can act as environmental disturbances that affect quantum information.

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